1. Field of the Invention
This invention relates to the field of data communications in general and more particularly to communications between computers which are connected via elements of wide-area networks. Such networks may be either public or private, and may support only data communications or a mixture of data, video; and audio (voice) communications.
2. Prior Art
The use of communications networks to disseminate information is well known in the prior art. A conventional communications network includes a plurality of data terminal equipment (DTE) interconnected by a transmission network. The DTE may include a plethora of devices including computers, telephone, workstations, file servers or the like. Likewise, the transmission network may include a plethora of signal transmission media including optical fiber, conduction wires, wireless media satellite or the like. The sine-qua-non of a good communications network is the ease with which a DTE, sometimes called a station, can communicate with another station in the network. This condition is often called interoperability. The prior art has fostered interoperability by establishing standards.
Among the faster growing type of DTEs which can be connected in a communications network are Personal Computers (PCs). The communications capabilities of personal computers have evolved around industry standards for asynchronous communications, based on a specific asynchronous communications component, the INS8250A manufactured by National Semiconductor Corporation, also referred to as a Universal Asynchronous Receiver/Transmitter (UART). The UART has been connected to industry standard personal computers (PCs) using specific addresses within the PCs input/output address range. Specific PC interrupt levels have also been assigned to connect to the UART, in order to provide more efficient feedback to the PC of the current state of the communications component. The interface between the PC and the UART, consisting of a range of addresses and a PC interrupt level, are referred to in the industry as a communications port or COMM port. A typical PC will define one or more COMM ports by reserving blocks of addresses within its input/output address range, along with the interrupt level(s) typically associated with asynchronous communications.
The COMM port interface is capable of handling only one byte of data at a time. Typically, an interrupt is generated after each byte of data has been transmitted or received, notifying the PC that the UART is ready to transmit the next byte, or that the PC should read the most recently received byte. Some extensions to the standard COMM port have been developed which allow multiple bytes to be processed with a single interrupt by making use of a small buffer memory. In either case, the PC interrupt response time gates the rate at which a COMM port can transmit and receive data, and depending on the data rate used for communications and processing requirements of other programs running in the PC, may prevent the PC from providing data as fast as the communications link can handle it. Typically, the transmit process is more affected by this problem because it is typically allocated a lower priority interrupt than that assigned to the receive process. This limitation does not present a problem with asynchronous transmission since each byte is processed as an independent entity. The UART will send "marks" (logic 1) between transmitted bytes, and can fill in the time between bytes with as many "marks" as necessary.
However, throughput limitations of a COMM port interface do present a significant problem for synchronous communications. Whereas asynchronous communications processes each byte of data as an independent entity, synchronous communications protocols must process an entire message or frame as the smallest data structure which can be independently handled. Consequently, once a communications device starts transmitting a message using synchronous protocol, it must continue to process the entire message without interruption. Interrupt response times associated with a COMM port interface would typically interrupt a message before completion by failing to transfer data as quickly as required.
Because of this limitation, most data communications used by personal computers is asynchronous. Numerous asynchronous communications applications and terminal emulation programs have been developed for PCs which depend on the COMM port interface to communications hardware. Larger computers do not have the limitations of a COMM port interface, and often use synchronous communications because of lower overhead and better error control procedures.
FIG. 9 illustrates a straightforward synchronous connection using synchronous communications hardware in each station. For purposes of discussion, each station is represented by a layer nomenclature similar to the one used by the ISO standard. This method of representing a station is well known in the technology and further discussion of the respective layers will not be given. Station 1 communicates with station 2 over transmission link 3. This is a balanced system in that the station 1 device and station 2 device have identical numbers of layers. Stated another way, each unit performs the same type of operation on a synchronous frame in order to exchange information between the stations. It should be noted that the HDLC MAC layer performs frame check sequence (CS) generation and checking, data transparency modifications (HDLC 0 insertion/deletion) and flag generation and checking.
Protocol converters have been developed by numerous equipment suppliers. The protocol converters convert an asynchronous protocol into a synchronous protocol, in order to enable a PC with asynchronous communications capabilities to connect to a host computer which only supports synchronous communications. U.S. Pat. Nos. 5,054,020, Re. 34,536 and 5,239,544 are cited as examples of protocol converters. U.S. Pat. No. 4,700,358 is also cited as an example of a protocol converter which is imbedded within the asynchronous communications hardware of a PC. Although the present invention to be described hereinafter exhibits some of the characteristics of a protocol converter, it will be clear from the detailed description that it is not a protocol converter. Specifically, a protocol converter is designed to allow an asynchronous client PC application to communicate with a synchronous host application, whereas the present invention is designed to allow two synchronous applications executing on different PCs to communicate, even though one of those applications must interface to its communications hardware through an asynchronous COMM port.
In addition, means have been devised which allow two synchronous applications to communicate in spite of having a COMM port as the interface to communications hardware. This is accomplished by inserting special control characters in the data stream which allow identification of the beginning and end of a framed message even when individual bytes making up the message are transmitted independently and asynchronously with possible time delays between bytes. International Standards Organization (ISO) standard 3309 describes a means of communicating across an asynchronous start/stop link using synchronous HDLC framing.
Likewise, publication RFC-1294 describes a similar technique which adapts synchronous TCP/IP messages to an asynchronous start/stop link. Both of these implementations are examples of a balanced system, meaning that both communicating devices must implement the same functions in order to communicate. FIG. 10 illustrates such a communications environment. The prior art communications environment in FIG. 10 illustrates HDLC/Async node to node communications. In this environment, station 4 is communicating over transmission link 6 to station 5. As in FIG. 9, station 4 and station 5 are based upon the OSI reference model in which different layers are used to represent the function of a device, such as a PC, and the adapter which connects the PC to the transmission link. In FIG. 10, the adapter and COMM port would be part of the physical layer. The HDLC/Async MAC layer replaces the HDLC MAC layer of FIG. 9. The HDLC/Async MAC layer retains the integrity of the entire packet while allowing the packet to be transmitted 1 byte at a time. This is done by inserting a flag byte at the beginning and end of the packet and converting special bytes within the packet. The conversion will be described later.
As with FIG. 9, FIG. 10 is also a balanced system in that the number of functions performed on a data frame in each station are identical. Consequently, the number of layers in station 4 and station 5 are equivalent or identical. In an actual communications network, in order for synchronous application programs to communicate with each other using a synchronous protocol, both communicating devices must implement the same function. This creates unnecessary hardship in that it requires the user to make adjustments to pre-existing devices.
Therefore, what is required is a mechanism and/or procedure which allows unbalanced stations to communicate. As is used herein, stations are unbalanced if the PC and associated communications devices perform different sequence of operations than the operations performed in a paired PC. It is this deficiency that the present invention (to be described hereinafter) addresses.